r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 283

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

This LSI includes on-chip L-memory which stores instructions or data.
8.1
• Capacity
• Page
• Memory map
Table 8.1
• Ports
• Priority
Page
Page 0 of L memory
Page 1 of L memory
Total L memory capacity is 16 Kbytes.
The L memory is divided into two pages (pages 0 and 1).
The L memory is allocated in the addresses shown in table 8.1 in both the virtual address space
and the physical address space.
Each page has three independent read/write ports and is connected to each bus. The instruction
bus is used when L memory is accessed through instruction fetch. The operand bus is used
when L memory is accessed through operand access. The SuperHyway bus is used for L
memory access from the SuperHyway bus master module.
In the event of simultaneous accesses to the same page from different buses, the access
requests are processed according to priority. The priority order is: SuperHyway bus > operand
bus > instruction bus.
Features
L Memory Addresses
Section 8 L Memory
H'E500E000 to H'E500FFFF
H'E5010000 to H'E5011FFF
Memory Size (Two Pages Total)
Rev. 1.00 Oct. 01, 2007 Page 217 of 1956
16 Kbytes
Section 8 L Memory
REJ09B0256-0100