r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1532

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 35 USB Host Controller (USBH)
35.3.4
All bits are set by hardware and cleared by software.
These bits in this register can be cleared by writing 1 to bit positions to be cleared.
Rev. 1.00 Oct. 01, 2007 Page 1466 of 1956
REJ09B0256-0100
Bit
0
Initial value :
Initial value :
Bit
31 to 7
6
5
4
3
R/W :
R/W :
Bit :
Bit :
HcInterruptStatus Register (USBHIS)
Bit Name
HCR
Bit Name
RHSC
FNO
UE
RD
31
15
R
R
0
0
30
14
R
R
0
0
29
13
R
R
0
0
Initial Value R/W
0
All 0
0
0
Initial Value R/W
0
0
28
12
R
R
0
0
27
11
R
R
0
0
26
10
R
R
0
0
R/W
R
R/W
R/W
R/W
R/W
25
R
R
0
9
0
HostControllerReset
This bit is set to initiate a software reset. This bit is
cleared by the Host Controller upon completion of
the reset operation.
Description
RootHubStatusChange
FrameNumberOverflow
ResumeDetected
Description
Reserved
These bits are always read as 0. The write value
should always be 0
This bit is set when the content of HcRhStatus
register or the content of any HcRhPortStatus
register has changed.
This bit is set when bit 15 of FrameNumber
changes value from 0 to 1 or from 1 to 0.
UnrecoverableError
This bit is set when HC detects a system error that
is not USB related.
This bit is set when the Host Controller detects
resume signaling on a downstream port.
24
R
R
0
8
0
23
R
R
0
7
0
RHSC FNO
R/W
22
R
0
6
0
R/W
21
R
0
5
0
R/W
UE
20
R
0
4
0
R/W
RD
19
R
0
3
0
R/W
SF
18
R
0
2
0
WDH
R/W
17
R
0
1
0
R/W
SO
16
R
0
0
0

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