r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 189
r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
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• Sources:
• Transition address: VBR + H'0000100
• Transition operations:
Data_address_error()
{
}
Word data access from other than a word boundary (2n +1)
Longword data access from other than a longword data boundary (4n +1, 4n + 2, or 4n +3)
Quadword data access from other than a quadword data boundary (8n +1, 8n + 2, 8n +3, 8n
Access to area H'80000000 to H'FFFFFFFF in user mode
The virtual address (32 bits) at which this exception occurred is set in TEA, and the
corresponding virtual page number (22 bits) is set in PTEH [31:10]. ASID in PTEH indicates
the ASID when this exception occurred.
The PC and SR contents for the instruction at which this exception occurred are saved in SPC
and SSR. The R15 contents at this time are saved in SGR.
Exception code H'0E0 (for a read access) or H'100 (for a write access) is set in EXPEVT. The
BL, MD, and RB bits are set to 1 in SR, and a branch is made to PC = VBR + H'0100. For
details, see section 6, Memory Management Unit (MMU).
Data Address Error
TEA = EXCEPTION_ADDRESS;
PTEH.VPN = PAGE_NUMBER;
SPC = PC;
SSR = SR;
SGR = R15;
EXPEVT = read_access? H'0000 00E0: H'0000 0100;
SR.MD = 1;
SR.RB = 1;
SR.BL = 1;
PC = VBR + H'0000 0100;
+ 4, 8n + 5, 8n + 6, or 8n + 7)
Areas H'E0000000 to H'E3FFFFFF and H'E5000000 to H'E5FFFFFF can be accessed in
user mode. For details, see section 6, Memory Management Unit (MMU) and section 8, L
Memory.
Rev. 1.00 Oct. 01, 2007 Page 123 of 1956
Section 5 Exception Handling
REJ09B0256-0100
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