r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1261

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Bit
12 to 8
7 to 3
2 to 0
Bit Name
BRPS[4:0]
—
BRDV[2:0]
Initial
Value
00000
All 0
000
R/W
R/W
R
R/W
Description
Prescalar Setting
Set the master clock division ratio according to the
count value of the prescalar of the baud rate generator.
The range of settings is from 00000 (× 1/1) to 11111
(× 1/32).
Reserved
These bits are always read as 0. The write value should
always be 0.
Baud rate generator's Division Ratio Setting
Set the frequency division ratio for the output stage of
the baud rate generator.
000: Prescalar output × 1/2
001: Prescalar output × 1/4
010: Prescalar output × 1/8
011: Prescalar output × 1/16
100: Prescalar output × 1/32
101: Setting prohibited
110: Setting prohibited
111: Prescalar output × 1/1
•
Setting 111 is valid only when the bits BRPS[4:0]
are set to 00001.
The final frequency division ratio of the baud rate
generator is determined by the value of BRPS and
BRDV (maximum 1/1024).
Rev. 1.00 Oct. 01, 2007 Page 1195 of 1956
Section 29 Serial I/O with FIFO (SIOF)
REJ09B0256-0100