R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 1023
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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20.3.22 Endpoint Stall Register (EPSTL)
The bits in EPSTL are used to forcibly stall the endpoints on the application side. While a bit is set
to 1, the corresponding endpoint returns a stall handshake to the host. The stall bit for endpoint 0
is cleared automatically on reception of 8-byte command data for which decoding is performed by
the function and the EP0 STL bit is cleared. When the SETUPTS flag in the IFR0 register is set to
1, writing 1 to the EP0 STL bit is ignored. For detailed operation, see section 20.7, Stall
Operations.
Bit
7
6
5
4
3
2
1
0
Bit
Bit Name
Initial Value
R/W
Bit Name
EP3STL
EP2STL
EP1STL
EP0STL
R
7
0
Initial
Value
0
0
0
0
0
0
0
0
R
6
0
R/W
R
R
R
R
R/W
R/W
R/W
R/W
R
5
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
EP3 Stall
When this bit is set to 1, endpoint 3 is placed in the
stall state.
EP2 Stall
When this bit is set to 1, endpoint 2 is placed in the
stall state.
EP1 Stall
When this bit is set to 1, endpoint 1 is placed in the
stall state.
EP0 Stall
When this bit is set to 1, endpoint 0 is placed in the
stall state.
R
4
0
EP3STL
R/W
3
0
Rev. 2.00 Sep. 24, 2008 Page 989 of 1468
Section 20 USB Function Module (USB)
EP2STL
R/W
2
0
EP1STL
R/W
1
0
REJ09B0412-0200
EP0STL
R/W
0
0
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