R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 869
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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16.5.4
TCNT is cleared when compare match A or B occurs, depending on the settings of the bits
CCLR1 and CCLR0 in TCR. Figure 16.11 shows the timing of this operation.
16.5.5
TCNT is cleared at the rising edge or high level of an external reset input, depending on the
settings of bits CCLR1 and CCLR0 in TCR. The clear pulse width must be at least 2 states. Figure
16.12 and Figure 16.13 shows the timing of this operation.
Note: * Clearing by an external reset is available only in units 0 and 1.
Timing of Counter Clear by Compare Match
Timing of TCNT External Reset*
Pφ
Compare match
signal
TCNT
Figure 16.12 Timing of Clearance by External Reset (Rising Edge)
Figure 16.13 Timing of Clearance by External Reset (High Level)
Pφ
External reset
input pin
Clear signal
Pφ
External reset
input pin
Clear signal
TCNT
TCNT
Figure 16.11 Timing of Counter Clear by Compare Match
N – 1
N – 1
N
Rev. 2.00 Sep. 24, 2008 Page 835 of 1468
N
N
Section 16 8-Bit Timers (TMR)
H'00
H'00
H'00
REJ09B0412-0200
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