R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 674
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 13 I/O Ports
(7)
The pin function is switched as shown below according to the combination of operating mode, the
EXPE bit, the port function control register (PFCR), and the PF1DDR bit settings.
Note:
(8)
The pin function is switched as shown below according to the combination of operating mode, the
EXPE bit, the port function control register (PFCR), and the PF0DDR bit settings.
Note:
Rev. 2.00 Sep. 24, 2008 Page 640 of 1468
REJ09B0412-0200
MCU
Operating Mode
On-chip ROM
disabled extended
mode
Modes other than
on-chip ROM
disabled extended
mode
MCU
Operating Mode
On-chip ROM
disabled extended
mode
Modes other than
on-chip ROM
disabled extended
mode
PF1/A17
PF0/A16
*
*
Valid in external extended mode (EXPE = 1)
Valid in external extended mode (EXPE = 1)
Module Name
Bus controller
Bus controller
I/O port
Module Name
Bus controller
Bus controller
I/O port
Pin Function
A17 output
A17 output*
PF1 output
PF1 input
(initial value)
Pin Function
A16 output
A16 output*
PF0 output
PF0 input
(initial value)
A17_OE
1
0
0
A16_OE
1
0
0
I/O Port
I/O Port
Setting
Setting
PF1DDR
1
0
PF0DDR
1
0
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