R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 1259
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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- Download datasheet (9Mb)
Note:
27.1.2
SUBCKCR stops the main clock oscillator, selects the operating clock of the system clock, and
selects the operating clock after a transition from software standby mode.
Bit
3
2
1
0
Bit
Bit Name
Initial Value
R/W
X: Don't care
Subclock Control Register (SUBCKCR)
Bit Name
BCK2
BCK1
BCK0
R/W
7
0
Initial
Value
0
0
1
0
R/W
6
0
R/W
R/W
R/W
R/W
R/W
R/W
5
0
Description
Reserved
Although this bit is readable/writable, only 0 should be
written to.
External Bus Clock (Bφ) Select
These bits select the frequency of the external bus
clock. The ratio to the input clock is as follows:
BCK (2:0) MD_CLK = 0
000:
001:
010:
011:
1XX:
The frequency of the external bus clock should be lower
than that of the system clock. Though these bits can be
set so as to make the frequency of the external bus
clock higher than that of the system clock, the clocks
will have the same frequency in reality.
R/W
4
0
Setting prohibited
× 4
× 2
× 1
× 1/2
R/W
3
0
Rev. 2.00 Sep. 24, 2008 Page 1225 of 1468
EXSTP
Section 27 Clock Pulse Generator
R/W
2
0
MD_CLK = 1
× 2
× 1
× 1/2
Setting prohibited
WAKE32K
R/W
1
0
REJ09B0412-0200
CK32K
R/W
0
0
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