R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 868
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 16 8-Bit Timers (TMR)
16.5.2
The CMFA and CMFB flags in TCSR are set to 1 by a compare match signal generated when the
TCOR and TCNT values match. The compare match signal is generated at the last state in which
the match is true, just before the timer counter is updated. Therefore, when the TCOR and TCNT
values match, the compare match signal is not generated until the next TCNT clock input. Figure
16.9 shows this timing.
16.5.3
When a compare match signal is generated, the timer output changes as specified by the bits OS3
to OS0 in TCSR. Figure 16.10 shows the timing when the timer output is toggled by the compare
match A signal.
Rev. 2.00 Sep. 24, 2008 Page 834 of 1468
REJ09B0412-0200
Pφ
Compare match A
signal
Timer output pin
Timing of CMFA and CMFB Setting at Compare Match
Timing of Timer Output at Compare Match
Pφ
TCNT
TCOR
Compare match
signal
CMF
Figure 16.10 Timing of Toggled Timer Output at Compare Match A
Figure 16.9 Timing of CMF Setting at Compare Match
N
N
N + 1
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