R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 148
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 6 Exception Handling
6.2
Different vector table address offsets are assigned to different exception sources. The vector table
addresses are calculated from the contents of the vector base register (VBR) and vector table
address offset of the vector number. The start address of the exception service routine is fetched
from the exception handling vector table indicated by this vector table address.
Table 6.2 shows the correspondence between the exception sources and vector table address
offsets. Table 6.3 shows the calculation method of exception handling vector table addresses.
Table 6.2
Rev. 2.00 Sep. 24, 2008 Page 114 of 1468
REJ09B0412-0200
Exception Source
Reset
Reserved for system use
Illegal instruction
Trace
Reserved for system use
Interrupt (NMI)
Trap instruction
CPU address error
DMA address error*
UBC break interrupt
Reserved for system use
Sleep interrupt
Exception Sources and Exception Handling Vector Table
Exception Handling Vector Table
(#0)
(#1)
(#2)
(#3)
3
Vector Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
17
18
Normal Mode*
H'0000 to H'0001
H'0002 to H'0003
H'0004 to H'0005
H'0006 to H'0007
H'0008 to H'0009
H'000A to H'000B
H'000C to H'000D
H'000E to H'000F
H'0010 to H'0011
H'0012 to H'0013
H'0014 to H'0015
H'0016 to H'0017
H'0018 to H'0019
H'001A to H'001B
H'001C to H'001D
H'001E to H'001F
H'0022 to H'0023
H'0024 to H'0025
Vector Table Address Offset*
2
Advanced, Middle*
Maximum*
H'0000 to H'0003
H'0004 to H'0007
H'0008 to H'000B
H'000C to H'000F
H'0010 to H'0013
H'0014 to H'0017
H'0018 to H'001B
H'001C to H'001F
H'0020 to H'0023
H'0024 to H'0027
H'0028 to H'002B
H'002C to H'002F
H'0030 to H'0033
H'0034 to H'0037
H'0038 to H'003B
H'003C to H'003F
H'0044 to H'0047
H'0048 to H'004B
2
Modes
1
2
,
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