R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 1338

• Manufacturer Part Number: R5F61663RN50FPV
• Description: MCU FLASH 384K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61663RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 29 List of Registers
Rev. 2.00 Sep. 24, 2008 Page 1304 of 1468
REJ09B0412-0200
Register Name
Serial status register_1
Receive data register_1
Smart card mode register_1
A/D data register A_0
A/D data register B_0
A/D data register C_0
A/D data register D_0
A/D data register E_0
A/D data register F_0
A/D data register G_0
A/D data register H_0
A/D control/status register_0
A/D control register_0
Timer control/status register
Timer counter
Reset control/status register
Timer control register_0
Timer control register_1
Timer control/status register_0
Timer control/status register_1
Time constant register A_0
Time constant register A_1
Time constant register B_0
Time constant register B_1
Timer counter_0
Timer counter_1
Timer counter control register_0
Timer counter control register_1
Timer start register
Timer synchronous register
Timer control register_0
Abbreviation
SSR_1
RDR_1
SCMR_1
ADDRA_0
ADDRB_0
ADDRC_0
ADDRD_0
ADDRE_0
ADDRF_0
ADDRG_0
ADDRH_0
ADCSR_0
ADCR_0
TCSR
TCNT
RSTCSR
TCR_0
TCR_1
TCSR_0
TCSR_1
TCORA_0
TCORA_1
TCORB_0
TCORB_1
TCNT_0
TCNT_1
TCCR_0
TCCR_1
TSTR
TSYR
TCR_0
8
8
8
8
8
8
Number
of Bits
8
8
16
16
16
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Address
H'FFF8C
H'FFF8D
H'FFF8E
H'FFF90
H'FFF92
H'FFF98
H'FFF9C
H'FFFA0
H'FFFA4
H'FFFA5
H'FFFA7
H'FFFB0
H'FFFB1
H'FFFB2
H'FFFB4
H'FFFB5
H'FFFB6
H'FFFB7
H'FFFB8
H'FFFB9
H'FFFBA
H'FFFBB
H'FFFBD
H'FFFC0
H'FFF94
H'FFF96
H'FFF9A
H'FFF9E
H'FFFA1
H'FFFB3
H'FFFBC
Module
SCI_1
SCI_1
SCI_1
A/D_0
A/D_0
A/D_0
A/D_0
A/D_0
A/D_0
A/D_0
A/D_0
A/D_0
A/D_0
WDT
WDT
WDT
TMR_0
TMR_1
TMR_0
TMR_1
TMR_0
TMR_1
TMR_0
TMR_1
TMR_0
TMR_1
TMR_0
TMR_1
TPU
TPU
TPU_0
Data
Width
8
8
8
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
Access
Cycles
(Read/Write)
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/3Pφ
2Pφ/3Pφ
2Pφ/3Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ