R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 832
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 15 Programmable Pulse Generator (PPG)
15.4.2
Figures 15.5 and 15.6 show a sample procedure for setting up normal pulse output.
• Sample Setup Procedure for PPG0
Rev. 2.00 Sep. 24, 2008 Page 798 of 1468
REJ09B0412-0200
TPU0 setup
PPG0 setup
TPU0 setup
Sample Setup Procedure for Normal Pulse Output
Figure 15.5 Setup Procedure for Normal Pulse Output (PPG0)
Set counting operation
Select interrupt request
Select TGR functions
Set initial output data
Select output trigger
Enable pulse output
Normal PPG output
Compare match?
Set TGRA value
Set next pulse
Set next pulse
Start counter
output data
output data
Yes
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] At each TGIA interrupt, set the next
Set TIOR in TPU0 to make TGRA an
output compare register (with output
disabled).
Set the PPG output trigger cycle.
Select the counter clock source with bits
TPSC2 to TPSC0 in TCR. Select the
counter clear source with bits CCLR1 and
CCLR0.
Enable the TGIA interrupt in TIER. The
DTC or DMAC can also be set up to
transfer data to NDR.
Set the initial output values in PODR.
Set the bits in NDER for the pins to be
used for pulse output to 1.
Select the TPU compare match event to
be used as the output trigger in PCR.
Set the next pulse output values in NDR.
Set the CST bit in TSTR to 1 to start the
TCNT counter.
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