R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 208
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 8 User Break Controller (UBC)
8.3.1
Each break address register n (BARn) consists of break address register nH (BARnH) and break
address register nL (BARnL). Together, BARnH and BARnL specify the address used as a break
condition on channel n of the UBC.
• BARnH
[Legend]
n = Channels A to D
• BARnL
[Legend]
n = Channels A to D
Rev. 2.00 Sep. 24, 2008 Page 174 of 1468
REJ09B0412-0200
Bit
31 to 16
Bit
15 to 0
BARnH
BARnL
Initial Value:
Initial Value:
R/W:
R/W:
Bit:
Bit:
Break Address Register n (BARA, BARB, BARC, BARD)
Bit Name
Bit Name
BARn31 to
BARn16
BARn15 to
BARn0
BARn31
BARn15
R/W
R/W
31
15
0
0
BARn30
BARn14
R/W
R/W
30
14
0
0
BARn29
BARn13
R/W
R/W
29
13
0
0
Initial
Value
All 0
Initial
Value
All 0
BARn28
BARn12
R/W
R/W
28
12
0
0
BARn27
BARn11
R/W
R/W
27
11
0
0
R/W
R/W
R/W
R/W
BARn26
BARn10
R/W
R/W
26
10
0
0
BARn25
BARn9
Description
Break Address n31 to 16
These bits hold the upper bit values (bits 31 to 16) for
the address break-condition on channel n.
Description
Break Address n15 to 0
These bits hold the lower bit values (bits 15 to 0) for
the address break-condition on channel n.
R/W
R/W
25
0
9
0
BARn24
BARn8
R/W
R/W
24
0
8
0
BARn23
BARn7
R/W
R/W
23
7
0
0
BARn22
BARn6
R/W
R/W
22
6
0
0
BARn21
BARn5
R/W
R/W
21
0
5
0
BARn20
BARn4
R/W
R/W
20
0
4
0
BARn19
BARn3
R/W
R/W
19
0
3
0
BARn18
BARn2
R/W
R/W
18
0
2
0
BARn17
BARn1
R/W
R/W
17
0
1
0
BARn16
BARn0
R/W
R/W
16
0
0
0
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