R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 1152

• Manufacturer Part Number: R5F61663RN50FPV
• Description: MCU FLASH 384K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61663RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 25 Flash Memory
Table 25.3 Registers/Parameters and Target Modes
Notes: 1. The setting is required when programming or erasing the user MAT in user boot mode.
25.7.1
The programming/erasing interface registers are 8-bit registers that can be accessed only in bytes.
These registers are initialized by a reset.
(1)
FCCS monitors errors during programming/erasing the flash memory and requests the on-chip
program to be downloaded to the on-chip RAM.
Rev. 2.00 Sep. 24, 2008 Page 1118 of 1468
REJ09B0412-0200
Register/Parameter
Programming/
erasing interface
registers
Programming/
erasing interface
parameters
RAM emulation
Bit
Bit Name
Initial Value
R/W
Note:
Flash Code Control/Status Register (FCCS)
2. The setting may be required according to the combination of initiation mode and read
*
Programming/Erasing Interface Registers
target memory MAT.
This is a write-only bit. This bit is always read as 0.

R
7
1
FCCS
FPCS
FECS
FKEY
FMATS
FTDAR
DPFR
FPFR
FPEFEQ 
FMPAR
FMPDR
FEBS
RAMER

R
6
0
Down-
load
O
O
O
O

O
O






R
5
0
Initiali-
zation







O
O




FLER
R
4
0
Program-
ming



O
O*


O

O
O


1

R
3
0
Erasure



O
O*


O



O

1

R
2
0
Read




O*









2
R
1
0
RAM
Emulation












O
(R)/W*
SCO
0
0