R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 366
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 9 Bus Controller (BSC)
Some DRAMs with the self-refresh have a given time between cancellation of the self-refresh
mode and the subsequent command issued cycle. From one to seven of precharge cycles
immediately after cancellation of the self-refresh mode can be inserted. Normal precharge is also
performed according to bits TPC1 and TPC0 in DRACCR. Set the precharge time including the
normal precharge so that the precharge time immediately after a self-refresh cycle is optimal.
Figure 9.80 shows a timing example when one precharge cycle is added.
Rev. 2.00 Sep. 24, 2008 Page 332 of 1468
REJ09B0412-0200
DQMLU, DQMLL
Precharge-sel
Software Standby Mode (TPCS2 to TPCS0 = H'1, TPC1 = 0, TPC0 = 0)
Address bus
Figure 9.80 Timing Example when 1 Precharge Cycle Added in the
SDRAMφ
Data bus
RD/WR
RAS
CAS
CKE
WE
CS
BS
Software
standby
TR
NOP
c2
TR
c3
TR
p1
PALL
Row address
T
p
SDRAM space write
ACTV
address
Row
T
r
Column address
NOP
T
c1
WRITE
T
c2
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