R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 566
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 11 EXDMA Controller (EXDMAC)
When a word or longword is specified as a data access size but the source or destination address is
not at the word or longword boundary, use the appropriate data access size for efficient data
transfer.
In an example shown in figure 11.56, a longword-size transfer is performed with 4-longword
specified as a cluster size in the cluster transfer dual address mode from the lower two bits of B'11
to B'10.
Rev. 2.00 Sep. 24, 2008 Page 532 of 1468
REJ09B0412-0200
Bφ
Address bus
RD
WR
ETEND
Address B
Address T
A
A
Figure 11.55 Cluster Transfer Dual Address Mode Operation
Figure 11.54 Timing in Cluster Transfer Dual Address Mode
EDSAR
First cluster
Second cluster
Nth cluster
EDSAR
EXDMA read cycle
Cluster size:
BKSZH ×
Data accsess size
Transfer
EDSAR
EDDAR
First cluster
Second cluster
Nth cluster
EXDMA write cycle
EDDAR
EDDAR
Address T
Address B
B
B
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