R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 688
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 13 I/O Ports
Rev. 2.00 Sep. 24, 2008 Page 654 of 1468
REJ09B0412-0200
Port
P2
7
6
5
4
3
2
Output
Specification
Signal Name
TIOCB5_OE
PO7_OE
TIOCA5_OE
TMO1_OE
TxD1_OE
PO6_OE
TIOCA4_OE
PO5_OE
TIOCB4_OE
SCK1_OE
PO4_OE
TIOCD3_OE
PO3_OE
TIOCC3_OE
TMO0_OE
TxD0_OE
PO2_OE
Output
Signal
Name
TIOCB5
PO7
TIOCA5
TMO1
TxD1
PO6
TIOCA4
PO5
TIOCB4
SCK1
PO4
TIOCD3
PO3
TIOCC3
TMO0
TxD0
PO2
Signal Selection
Register Settings
Peripheral Module Settings
TPU.TIOR_5.IOB3 = 0,
TPU.TIOR_5.IOB[1,0] = 01/10/11
NDERL.NDER7 = 1
TPU.TIOR_5.IOA3 = 0,
TPU.TIOR_5.IOA[1,0] = 01/10/11
TMR.TCSR_1.OS[1,0] = 01/10/11
NDERL.NDER6 = 1
TPU.TIOR_4.IOA3 = 0,
TPU.TIOR_4.IOA[1,0] = 01/10/11
NDERL.NDER5 = 1
TPU.TIOR_4.IOB3 = 0,
TPU.TIOR_4.IOB[1,0] = 01/10/11
When SCMR.SMIF = 1:
SCR.TE = 1 or SCR.RE = 1 while
SMR.GM = 0, SCR.CKE [1, 0] = 01 or while
SMR.GM = 1
When SCMR.SMIF = 0:
SCR.TE = 1 or SCR.RE = 1 while
SMR.C/A = 0, SCR.CKE [1, 0] = 01 or while
SMR.C/A = 1, SCR.CKE 1 = 0
NDERL.NDER4 = 1
TPU.TMDR.BFB = 0,
TPU.TIORL_3.IOD3 = 0,
TPU.TIORL_3.IOD[1,0] = 01/10/11
NDERL.NDER3 = 1
TPU.TMDR.BFA = 0,
TPU.TIORL_3.IOC3 = 0,
TPU.TIORL_3.IOD[1,0] = 01/10/11
TMR.TCSR_0.OS[1,0] = 01/10/11
NDERL.NDER2 = 1
TMR.TCSR_1.OS3,2 = 01/10/11 or
SCR.TE = 1
TMR.TCSR_0.OS[3,2] = 01/10/11 or
SCR.TE = 1
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