DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 110

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 4 Clock Pulse Generator (CPG)
Notes:
Caution:
Page 82 of 1190
Clock
Operating
Mode
3
FRQCR
Setting
H'1404
H'1406
H'1414
H'1416
H'1424
H'1426
H'1444
H'1446
H'1515
H'1535
H'1555
1. The ratio of clock frequencies, where the input clock frequency is assumed to be 1.
2. In modes 0 and 2, the frequency of the clock input from the EXTAL pin or the
3. Use an internal clock (Iφ) frequency of 120 MHz or lower for the regular
Do not use this LSI for frequency settings other than those in table 4.3.
frequency of the crystal resonator. In mode 3, the frequency of the clock input from
the CKIO pin.
specifications and 100 MHz or lower for the wide-range specifications. Use a CKIO
pin or bus clock (Bφ) frequency of 60 MHz or lower. Pφ must be from 5 through 40
MHz.
PLL
Circuit 1
ON (×6)
ON (×6)
ON (×6)
ON (×6)
ON (×6)
ON (×6)
ON (×6)
ON (×6)
ON (×8)
ON (×8)
ON (×8)
PLL Frequency
Multiplier
PLL
Circuit 2
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Ratio of
Internal Clock
Frequencies
(I:B:P)
6:1:1
6:1:1/2
3:1:1
3:1:1/2
2:1:1
2:1:1/2
1:1:1
1:1:1/2
4:1:1
2:1:1
1:1:1
*
1
Input Clock
20
20
20 to 33.33
20 to 33.33
20 to 33.33
20 to 33.33
20 to 33.33
20 to 33.33
20 to 25
20 to 25
20 to 25
*
2
Output Clock
(CKIO Pin)
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Selectable Frequency Range (MHz)
*
3
CPU Clock
(Iφ)
120
120
60 to 100
60 to 100
40 to 66.67
40 to 66.67
20 to 33.33
20 to 33.33
80 to 100
40 to 50
20 to 25
*
3
R01UH0026EJ0300 Rev. 3.00
Bus Clock
(Bφ)
20
20
20 to 33.33
20 to 33.33
20 to 33.33
20 to 33.33
20 to 33.33
20 to 33.33
20 to 25
20 to 25
20 to 25
*
3
SH7201 Group
Peripheral
Clock (Pφ)
20
10
20 to 33.33
10 to 16.67
20 to 33.33
10 to 16.67
20 to 33.33
10 to 16.67
20 to 25
20 to 25
20 to 25
Sep 24, 2010
*
3