DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 467

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
Note:
Table 12.32 Setting of Bits BF1 and BF0
Table 12.33 TIOC4D Output Level Select Function
Note: The reverse phase waveform initial output value changes to the active level after elapse of
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
0
Bit 7
BF1
0
0
1
1
Bit 5
OLS3N
0
1
the dead time after count start.
* Setting the TOCS bit in TOCR1 to 1 makes this bit setting valid.
Bit Name
OLS1P
Initial Output
High level
Low level
Bit 6
BF0
0
1
0
1
Initial
value
0
Complementary PWM Mode
Does not transfer data from the
buffer register (TOLBR) to TOCR2.
Transfers data from the buffer
register (TOLBR) to TOCR2 at the
crest of the TCNT_4 count.
Transfers data from the buffer
register (TOLBR) to TOCR2 at the
trough of the TCNT_4 count.
Transfers data from the buffer
register (TOLBR) to TOCR2 at the
crest and trough of the TCNT_4
count.
Active Level
Low level
High level
R/W
R/W
Description
Output Level Select 1P*
This bit selects the output level on TIOC3B in reset-
synchronized PWM mode/complementary PWM mode.
See table 12.38.
Up Count
High level
Low level
Function
Description
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
Compare Match Output
Reset-Synchronized PWM Mode
Does not transfer data from the
buffer register (TOLBR) to TOCR2.
Transfers data from the buffer
register (TOLBR) to TOCR2 when
TCNT_3/TCNT_4 is cleared
Setting prohibited
Setting prohibited
Down Count
Low level
High level
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