DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 706

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 16 Serial Communication Interface with FIFO (SCIF)
Page 678 of 1190
Bit
5
4
Bit Name
PE
O/E
Initial
Value
0
0
R/W
R/W
R/W
Description
Parity Enable
Selects whether to add a parity bit to transmit data and
to check the parity of receive data, in asynchronous
mode. In clocked synchronous mode, a parity bit is
neither added nor checked, regardless of the PE setting.
0: Parity bit not added or checked
1: Parity bit added and checked*
Note: * When PE is set to 1, an even or odd parity bit is
Parity mode
Selects even or odd parity when parity bits are added
and checked. The O/E setting is used only in
asynchronous mode and only when the parity enable bit
(PE) is set to 1 to enable parity addition and checking.
The O/E setting is ignored in clocked synchronous
mode, or in asynchronous mode when parity addition
and checking is disabled.
0: Even parity*
1: Odd parity*
Notes: 1. If even parity is selected, the parity bit is
2. If odd parity is selected, the parity bit is added
added to transmit data, depending on the parity
mode (O/E) setting. Receive data parity is
checked according to the even/odd (O/E) mode
setting.
added to transmit data to make an even
number of 1s in the transmitted character and
parity bit combined. Receive data is checked
to see if it has an even number of 1s in the
received character and parity bit combined.
to transmit data to make an odd number of 1s
in the transmitted character and parity bit
combined. Receive data is checked to see if it
has an odd number of 1s in the received
character and parity bit combined.
2
1
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010