DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 842

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 19 Controller Area Network (RCAN-ET)
Important: Although core of RCAN-ET is designed based on a 32-bit bus system, the whole
RCAN-ET including MPI for the CPU has 16-bit bus interface to CPU. LongWord (32-bit)
accesses are converted into two consecutive word accesses by the bus interface.
19.2.2
(1)
The MPI allows communication between the Renesas CPU and RCAN-ET's registers/mailboxes to
control the memory interface. It also contains the Wakeup Control logic that detects the CAN bus
activities and notifies the MPI and the other parts of RCAN-ET so that the RCAN-ET can
automatically exit the Sleep mode.
It contains registers such as MCR, IRR, GSR and IMR.
(2)
The Mailboxes consists of RAM configured as message buffers and registers. There are 16
Mailboxes, and each mailbox has the following information.
<RAM>
• CAN message control (identifier, rtr, ide,etc)
• CAN message data (for CAN Data frames)
• Local Acceptance Filter Mask for reception
<Registers>
• CAN message control (dlc)
• 3-bit wide Mailbox Configuration, Disable Automatic Re-Transmission bit, Auto-
Page 814 of 1190
Transmission for Remote Request bit, New Message Control bit
Micro Processor Interface (MPI)
Mailbox
Functions of Each Block
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010