DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 351

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
SH7201 Group
Note: Only write to bits of this register other than the reload function enable bits (BRLOD,
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
5 to 0
SRLOD, and DRLOD) when a transfer operation is not in process on the corresponding
channel (the corresponding DASTS bit in the DMA arbitration status register (DMASTS) is
"0") and DMA transfer is disabled (DMST in the DMA activation control register (DMSCNT)
or DEN in DMA control register B for the channel (DMCNTBn) is set to "0"). Operation is not
guaranteed if this register is written to when both conditions are not satisfied.
Bit Name
DCTG[5:0]
Initial
Value
000000
R/W
R/W
Description
011011: SSI 0ch
011100: SSI 1ch
011101: RCAN-ET 0ch
011110: RCAN-ET 1ch
011111: MTU2 0ch
100000: MTU2 1ch
100001: MTU2 2ch
100010: MTU2 3ch
100011: MTU2 4ch
100100: ADC
100101 to 111111: Setting prohibited
Section 11 Direct Memory Access Controller (DMAC)
Page 323 of 1190

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