DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 942

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 22 I/O Ports
22.2.1
Table 22.3 lists the port B registers.
Table 22.3 Register Configuration
22.2.2
PBDRH and PBDRL are 16-bit readable/writable registers that store port B data. Bits PB31DR to
PB0DR correspond to pins PB31 to PB0, respectively.
If a pin is set to the general output function, the pin will output the value written to the
corresponding bit in PBDRH or PBDRL, and the register value is read from PBDRH or PBDRL
regardless of the state of the pin.
If a pin is set to the general input function, the pin state, not the register value, will be returned if
PBDRH or PBDRL is read. Also, if a value is written to PBDRH or PBDRL, although the value
will actually be written, it will have no influence on the state of the pin. Table 22.4 summarizes
the PBDRH and PBDRL read/write operations.
PBDRH and PBDRL are initialized to H'0000 by a power-on reset or in deep standby mode. These
registers are not initialized either by a manual reset or by switching to sleep mode or software
standby mode.
Page 914 of 1190
Register Name
Port B data register H
Port B data register L
Port B port register H
Port B port register L
Register Configuration
Port B Data Registers H and L (PBDRH and PBDRL)
Abbreviation
PBDRH
PBDRL
PBPRH
PBPRL
R/W
R/W
R/W
R
R
Address
H'FFFE3808
H'FFFE380A
H'FFFE380C
H'FFFE380E
R01UH0026EJ0300 Rev. 3.00
Access Size
8, 16, 32
8, 16
8, 16, 32
8, 16
SH7201 Group
Sep 24, 2010

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