DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 966

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 23 Pin Function Controller (PFC)
23.1.2
PACR1 to PACR8 are 16-bit readable/writable registers that select the functions of the
multiplexed port A pins. When PINT3B to PINT0B are selected, do not set A input for the same
interrupt.
PACR8 and PACR7 are initialized to H'0000 by a power-on reset or by switching to deep standby
mode. PACR1 to PACR6 are initialized to H'1111 by a power-on reset or by switching to deep
standby mode. These registers are not initialized either by a manual reset or by switching to sleep
mode or software standby mode.
(1)
Page 938 of 1190
Bit
15, 14
13, 12
11, 10
Initial value:
Port A Control Register 8 (PACR8)
R/W:
Bit:
Bit Name
PA31MD
[1:0]
Port A Control Registers 1 to 8 (PACR1 to PACR8)
15
R
0
14
R
0
PA31MD[1:0]
R/W
Initial
Value
All 0
00
All 0
13
0
R/W
12
0
11
R/W
R
R/W
R
R
0
10
R
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
PA31 Mode
These bits control the function of the PA31/CRx1/
DTEND0 pin.
00: PA31 I/O (port)
01: CRx1 input (RCAN-ET)
10: DTEND0 output (DMAC)
11: Setting prohibited
Reserved
These bits are always read as 0. The write value
should always be 0.
PA30MD[1:0]
R/W
9
0
R/W
8
0
R
7
0
R
6
0
PA29MD[1:0]
R/W
5
0
R/W
4
0
R01UH0026EJ0300 Rev. 3.00
R
3
0
R
0
2
SH7201 Group
PA28MD[1:0]
R/W
Sep 24, 2010
1
0
R/W
0
0

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