DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 19

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

13.6
13.7
13.8
Section 14 Watchdog Timer (WDT)..................................................................625
14.1
14.2
14.3
14.4
14.5
Section 15 Realtime Clock (RTC) .....................................................................639
15.1
15.2
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Operation with Cascaded Connection............................................................................... 617
13.6.1
13.6.2
Interrupt Sources............................................................................................................... 618
13.7.1
13.7.2
Usage Notes ...................................................................................................................... 619
13.8.1
13.8.2
13.8.3
13.8.4
13.8.5
13.8.6
13.8.7
13.8.8
13.8.9
Features............................................................................................................................. 625
Input/Output Pin ............................................................................................................... 626
Register Descriptions ........................................................................................................ 627
14.3.1
14.3.2
14.3.3
14.3.4
WDT Usage ...................................................................................................................... 633
14.4.1
14.4.2
14.4.3
14.4.4
Usage Notes ...................................................................................................................... 636
14.5.1
14.5.2
14.5.3
14.5.4
14.5.5
Features............................................................................................................................. 639
Input/Output Pin ............................................................................................................... 641
16-Bit Counter Mode ........................................................................................ 617
Compare Match Count Mode............................................................................ 617
Interrupt Sources............................................................................................... 618
A/D Converter Activation................................................................................. 618
Notes on Setting Cycle...................................................................................... 619
Conflict between TCNT Write and Clear ......................................................... 619
Conflict between TCNT Write and Increment.................................................. 620
Conflict between TCOR Write and Compare Match ........................................ 620
Conflict between Compare Matches A and B................................................... 621
Switching of Internal Clocks and TCNT Operation.......................................... 621
Mode Setting with Cascaded Connection ......................................................... 623
Module Standby Setting.................................................................................... 623
Interrupts in Module Standby Mode ................................................................. 623
Watchdog Timer Counter (WTCNT)................................................................ 627
Watchdog Timer Control/Status Register (WTCSR) ........................................ 628
Watchdog Reset Control/Status Register (WRCSR) ........................................ 630
Notes on Register Access.................................................................................. 631
Canceling Software Standby Mode................................................................... 633
Changing the Frequency ................................................................................... 633
Using Watchdog Timer Mode........................................................................... 634
Using Interval Timer Mode............................................................................... 635
Timer Variation................................................................................................. 636
Prohibition against Setting H'FF to WTCNT.................................................... 636
Interval Timer Overflow Flag ........................................................................... 636
System Reset by WDTOVF Signal................................................................... 637
Manual Reset in Watchdog Timer Mode .......................................................... 637
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