CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 107
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CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 107 of 218
- Download datasheet (3Mb)
This chapter discusses the Internal Voltage References and their associated register. The internal voltage references provide
an absolute value of 1.3V to a variety of subsystems in the PSoC device. For a quick reference of all PSoC registers in
address order, refer to the
15.1
The internal voltage references consist of two blocks: a
bandgap voltage generator and a buffer with sample and
hold. The bandgap generator is typically a (V
design, where K is a numerical constant determined by cir-
cuit parameters.
The buffer circuit provides gain to the 1.2V bandgap volt-
age, to produce a 1.3V reference. A simplified schematic is
illustrated in
and capacitor is made through a CMOS switch, allowing the
reference voltage to be used by the system while the refer-
ence circuit is powered down. The voltage reference is
trimmed to 1.30V at room temperature.
PSoC CY8C20x34 TRM, Version 1.0
15.
Architectural Description
Internal Voltage References
Figure
Band
Gap
15-1. The connection between amplifier
VREF
1.3V
Register Reference chapter on page
VFB = 1.3V
vout 18 = 1.8V
To Flash
BE
+ K V
Figure 15-2. Flash Trim Buffer
Rtop
T
Rbot
)
FLS_PR3[1:0]
Mode Select
139.
Figure 15-1. Voltage Reference Schematic
Another block, which is associated with the internal voltage
reference circuitry, is the Flash trim buffer.
shows the conceptual block diagram for the Flash trim
buffer.
V
BG
VGND = 0.0V
+
-
Decoder
Digital
Logic
3 : 8
S + H
To Flash
FLTRIM
FLS_PR2[7:0]
V
REF
Figure 15-2
107
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