CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 166

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

STK_PP
20.3.26 STK_PP
This register is used to set the effective SRAM page for stack memory accesses in a multi-SRAM page PSoC device.
This register is only used when a device has more than one page of SRAM.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section below.
Reserved bits should always be written with a value of ‘0’. For additional information, refer to the
36
Bit
0
166
Individual Register Names and Addresses:
STK_PP: 0,D1h
Access : POR
Bit Name
0,D1h
in the RAM Paging chapter .
Page Bit
Name
Stack Page Pointer Register
7
6
Description
0b
1b
Note A value beyond the available SRAM, for a specific PSoC device, should not be set.
Bit determines which SRAM page is used to hold the stack. See the
for more information.
SRAM Page 0
SRAM Page 1
5
4
3
PSoC CY8C20x34 TRM, Version 1.0
2
RAM Paging chapter on page 33
Register Definitions on page
1
0,D1h
Page Bit
RW : 0
0