CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 122

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

SPI
Configuration Register
The configuration block contains 1 register. This register should not be changed while the block is enabled. Note that the SPI
Configuration register is located in bank 1 of the PSoC device’s memory map.
18.2.4
The SPI Configuration Register (SPI_CFG) is used to con-
figure the SPI.
Bits 7 to 5: Clock Sel. Clock Selection. These bits deter-
mine the operating frequency of the SPI Master.
Bit 4: Bypass. This bit determines whether or not the
inputs are synchronized to SYSCLK.
Bit 3: SS_. Slave Select. This bit determines the logic
value of the SS_ signal when the SS_EN_ signal is asserted
(SS_EN_ = 0).
18.2.4.1
Table 18-5. SPI Configuration Register Descriptions
122
1,29h
Address
Bit #
7:5
4
3
2
1
0
Clock Sel
Bypass
SS_
SS_EN_
Int Sel
Slave
Name
SPI_CFG
SPI_CFG Register
SPI Configuration Register Definitions
Name
Read/
Write
Read/
Write
Read/
Write
Read/
Write
Read/
Write
Read/
Write
Access
Bit 7
Master
Master/
Slave
Slave
Slave
Master/
Slave
Master/
Slave
Mode
SYSCLK
000b
001b
010b
011b
100b
101b
110b
111b
0 = All pin unputs are doubled, synchronized
1 = Input synchronization is bypassed.
0 = Slave selected
1 = Slave selection is determined from external SS_ pin.
0 = Slave selection determined from SS_ bit.
1 = Slave selection determined from external SS_ pin.
0 = Interrupt on TX Reg Empty
1 = Interrupt on SPI Complete
0 = Operates as a master.
1 = Operates as a slave.
Clock Sel
Bit 6
/ 2
/ 4
/ 8
/ 16
/ 32
/ 64
/ 128
/ 256
Bit 5
Bypass
Bit 4
Bit 2: SS_EN_. Slave Select Enable. This active low bit
determines if the slave select (SS_) signal is driven inter-
nally. If it is driven internally, its logic level is determined by
the SS_ bit. If it is driven externally, its logic level is deter-
mined by the external pin.
Bit 1: Int Sel. Interrupt Select. This bit selects which condi-
tion produces an interrupt.
Bit 0: Slave. This bit determines whether the block func-
tions as a master or slave.
For additional information, refer to the
page
185.
Bit 3
SS_
Description
SS_EN_
Bit 2
PSoC CY8C20x34 TRM, Version 1.0
Int Sel
Bit 1
SPI_CFG register on
Slave
Bit 0
RW : 00
Access