CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 179

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

20.3.38 CPU_F
This register provides read access to the M8C flags.
The AND f, expr; OR f, expr; and XOR f, expr flag instructions can be used to modify this register.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section below.
Reserved bits should always be written with a value of ‘0’. For additional information, refer to the
32
Bit
7:6
4
2
1
0
PSoC CY8C20x34 TRM, Version 1.0
Individual Register Names and Addresses:
CPU_F: x,F7h
Access : POR
Bit Name
in the M8C chapter.
PgMode[1:0]
XIO
Carry
Zero
GIE
Name
M8C Flag Register
7
PgMode[1:0]
RL : 0
6
Description
00b
01b
10b
11b
0
1
Set by the M8C CPU Core to indicate whether there has been a carry in the previous logical/arith-
metic operation.
0
1
Set by the M8C CPU Core to indicate whether there has been a zero result in the previous logical/
arithmetic operation.
0
1
0
1
Direct Address mode and Indexed Address mode operands are referred to RAM Page 0,
regardless of the values of CUR_PP and IDX_PP. Note that this condition prevails on entry
to an Interrupt Service Routine when the CPU_F register is cleared.
Direct Address mode instructions are referred to Page 0.
Indexed Address mode instructions are referred to the RAM page specified by the stack
page pointer, STK_PP.
Direct Address mode instructions are referred to the RAM page specified by the current
page pointer, CUR_PP.
Indexed Address mode instructions are referred to the RAM page specified by the index
page pointer, IDX_PP.
Direct Address mode instructions are referred to the RAM page specified by the current
page pointer, CUR_PP.
Indexed Address mode instructions are referred to the RAM page specified by the stack
page pointer, STK_PP.
Normal register address space
Extended register address space. Primarily used for configuration.
No carry
Carry
Not equal to zero
Equal to zero
M8C will not process any interrupts.
Interrupt processing enabled.
5
RL : 0
XIO
4
3
RL : 0
Carry
2
x,F7h
Register Definitions on page
RL : 0
Zero
1
RL : 0
x,F7h
GIE
0
CPU_F
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