CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 39
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CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 39 of 218
- Download datasheet (3Mb)
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This chapter discusses the Supervisory ROM (SROM) functions. For a quick reference of all PSoC registers in address order,
refer to the
4.1
The SROM holds code that is used to boot the PSoC
device, calibrate circuitry, and perform Flash operations.
The functions provided by the SROM are called from code
stored in the Flash or by device programmers.
The SROM is used to boot the part and provide interface
functions to the Flash banks.
functions.) The SROM functions are accessed by executing
the Supervisory System Call instruction (SSC) which has an
opcode of 00h. Before executing the SSC, the M8C’s accu-
mulator needs to load with the desired SROM function code
from
Attempting to access undefined functions causes a HALT.
The SROM functions execute code with calls; therefore, the
functions require stack space. With the exception of Reset,
all of the SROM functions have a parameter block in
SRAM that you must configure before executing the SSC.
Table 4-2
meaning of each parameter, with regards to a specific
SROM function, is described later in this chapter. Because
the SSC instruction clears the CPU_F PgMode bits, all
parameter block variable addresses are in SRAM Page 0.
The CPU_F value is automatically restored at the end of the
SROM function.
The MVR_PP and the MVW_PP pointers are not disabled
by clearing the CPU_F PgMode bits. Therefore, the
POINTER parameter is interpreted as an address in the
page indicated by the MVI page pointers, when the supervi-
sory operation is called. This allows the data buffer used in
the supervisory operation to be located in any SRAM page.
(See the
regarding the MVR_PP and MVW_PP pointers.)
PSoC CY8C20x34 TRM, Version 1.0
4.
Table
RAM Paging chapter on page 33
lists all possible parameter block variables. The
4-1.
Register Reference chapter on page
Architectural Description
Supervisory ROM (SROM)
(Table 4-1
lists the SROM
for more details
139.
Table 4-1. List of SROM Functions
Note ProtectBlock (described on page 42) and EraseAll (described on page
43) SROM functions are not listed in the table above because they are
dependent on external programming.
Table 4-2. SROM Function Variables
Two important variables that are used for all functions are
KEY1 and KEY2. These variables are used to help discrimi-
nate between valid SSCs and inadvertent SSCs. KEY1 must
always have a value of 3Ah, while KEY2 must have the
same value as the stack pointer when the SROM function
begins execution. This would be the SP (Stack Pointer)
value when the SSC opcode is executed, plus three. For all
SROM functions except SWBootReset, if either of the keys
do not match the expected values, the M8C will halt. The
SWBootReset function does not check the key values. It
only checks to see if the accumulator’s value is 0x00.
KEY1 / RETURN CODE
KEY2
BLOCKID
POINTER
CLOCK
Reserved
DELAY
Reserved
Function Code
00h
01h
02h
03h
06h
07h
08h
09h
02h
0Fh
Variable Name
SWBootReset
ReadBlock
WriteBlock
EraseBlock
TableRead
CheckSum
Calibrate0
Calibrate1
WriteAndVerify
HWBootReset
Function Name
Stack Space
Needed
10
0
7
9
3
3
4
3
7
3
SRAM Address
0,FAh
0,FBh
0,FCh
0,FDh
0,FEh
0,FFh
0,F8h
0,F9h
Page
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