CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 75

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

RLO_TIMER_IRQ
Figure 10-8 illustrates the variety of interrupt options for the block.
This diagram illustrates the 6-bit timer.
10.1.4
The programmable timer is a 6-bit down counter with a ter-
minal count output. This timer has one data register associ-
ated with it. The timer is started when the CapSense block is
enabled. The enable signal is double synchronized to the
timer’s clock domain. When started, the timer always starts
counting down from the value loaded into its data registers
(CS_TIMER). This timer only has a one shot mode, in which
the timer completes one full count cycle and stops. Disabling
and re-enabling the CapSense block will restart the timer.
Figure 10-7. RLO Timer Block Diagram
PSoC CY8C20x34 TRM, Version 1.0
RLO_TIMER_TC
C S C L K
Relaxation
Oscillator
CapSense
Clock
R L O
MUXBUS
TIMER
CMP1
CMP0
P X D _ E N
ILO
‘0’
Figure 10-6. 6-Bit Timer Diagram
0
1
Timer
INSEL[2:0]
Programmable
0
1
2
3
4
5
6
7
6 -B it
T im e r
Register
DATA[5:0]
Timer
INV
C O
IMO
Figure 10-5. Block Interrupt Options Diagram
R L O _ T IM E R _ T C
R L O _ T IM E R _ IR Q
(Control Logic)
PF DONE
CLK/RLO
Terminal
Count
IRQ
COH
COL
CLK
IMO
IN
BLOCK_EN
BLOCK_EN
IOW or
BLOCK_EN
BLOCK_EN
COHR
IOW or
COLR
Edge Detect
IOW or
IOW or
The timer’s clock is either the RLO clock or the CapSense
count clock, depending on the value of the PXD_EN bit in
the CS_CR2 register. See the
page 77
10.1.4.1
When started, the timer loads the value contained in its data
register and counts down to its terminal count of zero. The
timer outputs an active high terminal count pulse for one
clock cycle upon reaching the terminal count. The low time
of the terminal count pulse is equal to the loaded decimal
count value multiplied by the clock period. (TC
VALUE
output is the pulse width of the terminal count plus one clock
period. (TC
diagram in
decimal
for details.
R
S
R
S
R
S
R
S
Figure
period
* CLK
Operation
COHS
COLS
PPS
INS
= TC
10-12.
period
pw
PPM
COLM
). The period of the terminal count
COHM
INM
+ CLK
period
“CS_CR2 Register” on
). Refer to the timing
CapSense Module
pw
= COUNT
CS_INT
75