CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 42

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

Supervisory ROM (SROM)
Table 4-7. ReadBlock Parameters (01h)
4.1.2.4
The WriteBlock function is used to store data in the Flash.
Data is moved 64 bytes at a time from SRAM to Flash using
this function. Before doing a write, you must successfully
complete an EraseAll or an EraseBlock.
The first thing the WriteBlock function does is check the pro-
tection bits and determine if the desired BLOCKID is write-
able. If write protection is turned on, the WriteBlock function
will exit, setting the accumulator and KEY2 back to 00h.
KEY1 will have a value of 01h, indicating a write failure.
Write protection is set when the PSoC device is pro-
grammed externally and cannot be changed through the
SSC function.
The BLOCKID of the Flash block, where the data is stored,
must be determined and stored at SRAM address FAh. Valid
block IDs are 0x00 to 0x7F.
An MVI A, [expr] instruction is used to move data from
SRAM into Flash. Therefore, the MVI read pointer (MVR_PP
register) can be used to specify which SRAM page data is
pulled from. Using the MVI read pointer and the parameter
blocks POINTER value allows the SROM WriteBlock func-
tion to move data from any SRAM page into any Flash
block.
The SRAM address, of the first of the 64 bytes to be stored
in Flash, must be indicated using the POINTER variable in
the parameter block (SRAM address FBh).
Finally, the CLOCK and DELAY value must be set correctly.
The CLOCK value determines the length of the write pulse
that will be used to store the data in the Flash. The CLOCK
and DELAY values are dependent on the CPU speed and
must be set correctly. Refer to
page 45
Table 4-8. WriteBlock Parameters (02h)
42
MVW_PP
KEY1
KEY2
BLOCKID
POINTER
MVR_PP
KEY1
KEY2
BLOCKID
POINTER
CLOCK
DELAY
Name
Name
for additional information.
Address
Address
0,FCh
0,D4h
0,F8h
0,F9h
0,FAh
0,FBh
0,FEh
0,D5h
0,F9h
0,FAh
0,FBh
0,F8h
WriteBlock Function
Register
Register
Type
RAM
RAM
RAM
RAM
RAM
RAM
Type
RAM
RAM
RAM
RAM
MVI read page pointer register.
3Ah
Stack Pointer value+3, when SSC is
executed.
Flash block number
First of 64 addresses in SRAM, where
the data to be stored in Flash is located
prior to calling WriteBlock.
Clock divider used to set the write pulse
width.
For a CPU speed of 12 MHz set to 56h.
Stack Pointer value+3, when SSC is
Flash block number
Addresses in SRAM where returned
MVI write page pointer register
3Ah
executed.
data should be stored.
“Clocking Strategy” on
Description
Description
4.1.2.5
The EraseBlock function is used to erase a block of 64 con-
tiguous bytes in Flash.
The first thing the EraseBlock function does is check the
protection bits and determine if the desired BLOCKID is
writeable. If write protection is turned on, the EraseBlock
function exits, setting the accumulator and KEY2 back to
00h. KEY1 has a value of 01h, indicating a write failure.
To set up the parameter block for the EraseBlock function,
store the correct key values in KEY1 and KEY2. The block
number to erased must be stored in the BLOCKID variable,
and the CLOCK and DELAY values must be set based on
the current CPU speed. For more information on setting the
CLOCK and DELAY values,
page
Table 4-9. EraseBlock Parameters (03h)
4.1.2.6
The PSoC devices offer Flash protection on a block-by-
block basis.
In the table, ER and EW are used to indicate the ability to
perform external reads and writes (that is, by an external
programmer). For internal writes, IW is used. Internal read-
ing is always permitted by way of the ROMX instruction. The
ability to read by way of the SROM ReadBlock function is
indicated by SR.
In this table, note that all protection is removed by EraseAll.
Table 4-10. Protect Block Modes
KEY1
KEY2
BLOCKID
CLOCK
DELAY
00b
01b
10b
11b
Mode
Name
45.
SR ER EW IW
SR ER EW IW
SR ER EW IW
SR ER EW IW
Address
Settings
0,FAh
0,FCh
0,FEh
0,F8h
0,F9h
Table 4-10
EraseBlock Function
ProtectBlock Function
Type
RAM
RAM
RAM
RAM
RAM
PSoC CY8C20x34 TRM, Version 1.0
Unprotected
Read protect
Disable external write
Disable internal write
lists the protection modes available.
Description
3Ah
Stack Pointer value+3, when SSC is
executed.
Flash block number
Clock divider used to set the erase
pulse width.
For a CPU speed of 12 MHz set to
56h.
see “Clocking Strategy” on
Description
U = Unprotected
F = Factory upgrade
R = Field upgrade
W = Full protection
In PSoC Designer