CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 85
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CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 85 of 218
- Download datasheet (3Mb)
This chapter explains the Comparators for the CY8C20x34 PSoC device and its associated registers. For a complete table of
the comparator registers, refer to the
PSoC registers in address order, refer to the
12.1
The CY8C20x34 PSoC device contains two comparators designed to support capacitive sensing or other general purpose
uses.
PSoC CY8C20x34 TRM, Version 1.0
12.
AMuxBus
Reserved
Reserved
AMuxBus
Reserved
Reserved
(CS_CR3)
LPFilt[1:0]
VREF
RefLo
VREF
RefLo
RefHi
RefHi
P0[1]
P0[3]
(CMP_MUX)
P0[1]
P0[3]
(CMP_MUX)
Figure 12-1
INP0[1:0]
INN1[1:0]
(CMP_MUX)
(CMP_MUX)
INP1[1:0]
INN0[1:0]
Architectural Description
Comparators
LPF
shows a block diagram of the comparator system.
LPF_EN[0]
(CS_CR3)
LPF_EN[1]
(CS_CR3)
Enable, Range
(CMP_CR)
Enable, Range
2
(CMP_CR)
COMP1
2
COMP0
“Summary Table of the CapSense Registers” on page
Comparator Analog System
Figure 12-1. Comparators Block Diagram
Register Reference chapter on page
CMP0 LUT
CMP1 LUT
A
B
Reg Write
A
B
Reg Write
(CMP_LUT)
(CMP_LUT)
LUT1[3:0]
LUT0[3:0]
LUT
LUT
(CMP_CR1)
(CMP_CR1)
CRST1
CRST0
CMP1 LUT
CMP0 LUT
R
R
S
S
LATCH
LATCH
(CMP_CR1)
(CMP_CR1)
CDS1
CDS0
139.
I/O Read
I/O Read
(CMP_CR1)
(CMP_CR1)
I/O Read
I/O Read
CPIN1
CPIN0
72. For a quick reference of all
CINT1
CINT0
CMP1
CMP0
(CMP_RDC)
(CMP_RDC)
(CMP_RDC)
(CMP_RDC)
CMP1D
CMP0L
CMP1L
CMP1O
CMP0O
CMP0D
CMP1
CMP0
To: Cap Sense Logic,
To: Pin Outputs
To: Cap Sense Logic,
To: Pin Outputs
To: Analog
Interrupt
85
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