CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 73

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

This chapter presents the CapSense™ Module and its associated registers. For a complete table of the CapSense Module
registers, refer to the
address order, refer to the
10.1
10.1.1
The CY8C20x34 PSoC device contains hardware support
for a numbers of different capacitive sensing approaches. A
block diagram of the overall capacitive sensing architecture
is shown in
being measured. The various sensing approaches use dif-
ferent subsets of this hardware.
Figure 10-1. CapSense Module Block Diagram
PSoC CY8C20x34 TRM, Version 1.0
Vr
IMO
10.
Dedicated RO
Comparators
Comparator
Reference
IDAC
Buffer
Clock Select
V+
V-
CapSense
Architectural Description
Figure
CapSense Module
Types of CapSense Approaches
Cap Sense Counters
CSCLK
10-1. Cs1 through Csn are the capacitors
Mux
Mux
“Summary Table of the CapSense Registers” on page
Register Reference chapter on page
Refs
Relaxation
Oscillator
(RO)
Cinternal
Cs1
Cs2
Csn
Cexternal
139.
10.1.1.1
The relaxation oscillator (RO) method operates by forming
an oscillator using the sense capacitance. The IDAC, sense
capacitance, and comparator (switching between two refer-
ences) form the RO.
In the RO method the RO is compared to the frequency of
an internal oscillator over a predetermined interval.. This
interval is set by a number of cycles of the RO using a 6-bit
counter. During this interval, the IMO clocks a 16-bit counter
and the final count gives a measure of capacitance. (See
Figure
On each (rising/falling) edge of the relaxation oscillator, an
option allows the edge to operate with two different slew
rates. A faster charging rate can be set for a fixed time, fol-
lowed by a slower rate until the waveform reaches the target
threshold voltage. This approach can lead to increased
IMO
Figure 10-2. Relaxation Oscillator Block Diagram
10-2).
Clock Select
CapSense
72. For a quick reference of all PSoC registers in
IDAC
Dedicated RO
Relaxation Oscillator
Comparators
CSCLK
V-
V+
Cap Sense Logic
16-Bit Counter
6-Bit Counter
Pin Enables
Cs1
Cs2
Csn
73