CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 140

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

PRTxDR
20.3
The following registers are all in bank 0 and are listed in address order. An ‘x’ before the comma in the register’s address indi-
cates that the register can be accessed in Bank 0 and Bank 1, independent of the XIO bit in the CPU_F register. Registers
that are in both Bank 0 and Bank 1 are listed in address order in Bank 0. For example, the CPU_F register has an address of
X,F7h and is listed only in Bank 0 but is accessed in both Bank 0 and Bank 1.
20.3.1
This register allows for write or read access, of the current logical equivalent, of the voltage on the pin.
For PRT3DR, the upper nibble of this register will return the last data bus value when read and should be masked off prior to
using this information.
For additional information, refer to the
Bit
7:0
140
Individual Register Names and Addresses:
PRT0DR : 0,00h
Access : POR
Bit Name
0,00h
Data[7:0]
Name
Bank 0 Registers
PRTxDR
Port Data Register
7
PRT1DR : 0,04h
6
Description
Write value to port or read value from port. Reads return the state of the pin, not the value in the
PRTxDR register.
Register Definitions on page 57
5
PRT2DR : 0,08h
4
Data[7:0]
RW : 00
in the GPIO chapter.
3
PSoC CY8C20x34 TRM, Version 1.0
PRT3DR : 0,0Ch
2
1
0,00h
0