CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 113

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

PSoC CY8C20x34 TRM, Version 1.0
IMO (not to scale)
IMO (not to scale)
IMO (not to scale)
POR (IPOR followed by PPOR): Reset while POR is high (IMO off), then 511(+)
cycles (IMO on), and then the CPU reset is released. XRES is the same, with N=8.
PPOR (with no IPOR): Reset while PPOR is high and to the end of the next 32K
cycle (IMO off); 1 cycle IMO on before the CPU reset is released. Note that at the
3V level, PPOR will tend to be brief, because the reset clears the POR range
register (VLT_CR) back to the default 2.4V setting.
XRES: Reset while XRES is high (IMO off), then 7(+) cycles (IMO on), and then the
CPU reset is released.
Sleep Timer
Sleep Timer
Sleep Timer
CPU Reset
CPU Reset
CPU Reset
IMO PD
IMO PD
IMO PD
CLK32
PPOR
CLK32
PPOR
Reset
Reset
CLK32
XRES
Reset
IPOR
(Follows POR / XRES)
Figure 16-4. Key Signals During POR and XRES
0
0
0
0
1
1
1
2
2
511
7
N=512
8
System Resets
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