CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 154

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

CS_CR1
20.3.14 CS_CR1
This register contains additional CapSense system control options.
This register should never be written to while the block is enabled.
For additional information, refer to the
Bit
7
6:5
4
3
2:0
154
Individual Register Names and Addresses:
CS_CR1 : 0,A1h
Access : POR
Bit Name
0,A1h
CHAIN
CLKSEL[1:0]
RLOSEL
INV
INSEL[2:0]
Name
CapSense Control Register 1
RW : 0
CHAIN
7
6
Description
0
1
CapSense Clock (CSCLK) Selection
00b
01b
10b
11b
Relaxation Oscillator Clock (RLO) Select
0
1
Input Invert
0
1
Input Selection
000b
001b
010b
011b
100b
101b
110b
111b
Counter Chain Control
CLKSEL[1:0]
RW : 0
Register Definitions on page 76
8-bit high/low counters operate independently
High/low counters operate as a 16-bit synchronous block
IMO
IMO/2
IMO/4
IMO/8
High byte counter runs on the selected IMO-based frequency.
High byte counter runs on the RLO clock frequency.
Selected input is not inverted.
Selected input is inverted.
Comparator 0
ILO
Comparator 1
RLO Timer Terminal Count
Interval Timer
RLO Timer IRQ
Analog Global Mux Bus
‘0’
5
RLOSEL
RW : 0
4
in the CapSense Module chapter .
RW : 0
INV
3
PSoC CY8C20x34 TRM, Version 1.0
2
INSEL[2:0]
RW : 0
1
0,A1h
0