CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 24

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

Section B: PSoC Core
Core Register Summary
This table lists all the PSoC registers for the CPU core in address order within their system resource configuration. The
grayed bits are reserved bits. If these bits are written, always write them with a value of ‘0’. For the core registers, the first ‘x’
in some register addresses represents either bank 0 or bank 1. These registers are listed throughout this manual in bank 0,
even though they are also available in bank 1.
Summary Table of the Core Registers
24
x,F7h
x,6Ch
x,6Dh
x,6Eh
x,6Fh
0,D0h
0,D1h
0,D3h
0,D4h
0,D5h
0,DAh
0,E0h
0,E1h
0,E2h
0,00h
0,01h
0,04h
0,05h
0,08h
0,09h
0,0Ch
0,0Dh
1,00h
1,01h
1,04h
1,05h
1,08h
1,09h
1,0Ch
1,0Dh
1,DCh
1,E8h
1,E9h
Address
CPU_F
TMP_DR0
TMP_DR1
TMP_DR2
TMP_DR3
CUR_PP
STK_PP
IDX_PP
MVR_PP
MVW_PP
INT_CLR0
INT_MSK0
INT_SW_EN
INT_VC
PRT0DR
PRT0IE
PRT1DR
PRT1IE
PRT2DR
PRT2IE
PRT3DR
PRT3IE
PRT0DM0
PRT0DM1
PRT1DM0
PRT1DM1
PRT2DM0
PRT2DM1
PRT3DM0
PRT3DM1
IO_CFG
IMO_TR
ILO_TR
Name
Bit 7
I2C
I2C
PgMode[1:0]
INTERNAL LOW SPEED OSCILLATOR (ILO) REGISTER (page 61)
Sleep
Sleep
Bit 6
INTERNAL MAIN OSCILLATOR (IMO) REGISTER (page 60)
GENERAL PURPOSE IO (GPIO) REGISTERS (page 57)
INTERRUPT CONTROLLER REGISTERS (page 47)
RAM PAGING (SRAM) REGISTERS (page 33)
Bit 5
SPI
SPI
Bias Trim[1:0]
M8C REGISTER (page
Pending Interrupt[7:0]
Interrupt Enables[7:0]
Interrupt Enables[7:0]
Interrupt Enables[7:0]
Interrupt Enables[7:0]
GPIO
GPIO
Bit 4
XIO
Drive Mode 0[7:0]
Drive Mode 1[7:0]
Drive Mode 0[7:0]
Drive Mode 1[7:0]
Drive Mode 0[7:0]
Drive Mode 1[7:0]
Drive Mode 0[7:0]
Drive Mode 1[7:0]
Data[7:0]
Data[7:0]
Data[7:0]
Data[7:0]
Data[7:0]
Data[7:0]
Data[7:0]
Data[7:0]
Trim[7:0]
27
Timer
Timer
Bit 3
)
CapSense
CapSense
Carry
Bit 2
Freq Trim[3:0]
PSoC CY8C20x34 TRM, Version 1.0
REG_EN
Analog
Analog
Bit 1
Zero
ENSWINT
V Monitor
V Monitor
Page Bit
Page Bit
Page Bit
Page Bit
Page Bit
IOINT
Bit 0
GIE
RW : FF
RW : FF
RW : FF
RW : FF
Access
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RC : 00
RL : 02
W : 00
W : 00