CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 141
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CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 141 of 218
- Download datasheet (3Mb)
20.3.2
This register is used to enable/disable interrupts from individual GPIO pins.
For PRT3DR, the upper nibble of this register will return the last data bus value when read and should be masked off prior to
using this information.
For additional information, refer to the
Bit
7:0
PSoC CY8C20x34 TRM, Version 1.0
Individual Register Names and Addresses:
PRT0IE : 0,01h
Access : POR
Bit Name
Interrupt Enables[7:0]
Name
PRTxIE
Port Interrupt Enable Register
7
PRT1IE : 0,05h
6
Description
Bits enable the corresponding port pin interrupt.
0
1
Register Definitions on page 57
Port pin interrupt disabled for the corresponding pin.
Port pin interrupt enabled for the corresponding pin. Interrupt mode is determined by the
IOINT bit in the
5
IO_CFG
PRT2IE : 0,09h
Interrupt Enables[7:0]
4
RW : 00
register.
in the GPIO chapter.
3
PRT3IE : 0,0Dh
2
1
0,01h
0,01h
0
PRTxIE
141
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