CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 168

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

MVR_PP
20.3.28 MVR_PP
This register is used to set the effective SRAM page for MVI read memory accesses in a multi-SRAM page PSoC device.
This register is only used when a device has more than one page of SRAM.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section below.
Reserved bits should always be written with a value of ‘0’. For additional information, refer to the
36
Bit
0
168
Individual Register Names and Addresses:
MVR_PP: 0,D4h
Access : POR
Bit Name
0,D4h
in the RAM Paging chapter .
Page Bit
Name
MVI Read Page Pointer Register
7
6
Description
Bit determines which SRAM page a MVI Read instruction operates on.
1b
Note A value beyond the available SRAM, for a specific PSoC device, should not be set.
0b
SRAM Page 0
SRAM Page 1
5
4
3
PSoC CY8C20x34 TRM, Version 1.0
2
Register Definitions on page
1
0,D4h
Page Bit
RW : 0
0