ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 1056

• Manufacturer Part Number: ATSAM3U-EK
• Description: KIT EVAL FOR AT91SAM3U CORTEX
• Manufacturer: Atmel
• Type: MCUr

Specifications of ATSAM3U-EK

• Contents: Board
• Processor To Be Evaluated: SAM3U
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3 V
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: SAM3U4E
• Silicon Family Name: SAM3U
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

41.3
Table 41-1.
41.4
41.4.1
41.4.2
41.4.3
41.4.4
41.4.5
41.4.6
1056
Pin Name
AD12B0 - AD12B7
AD12BTRG
Signal Description
Product Dependencies
SAM3U Series
Power Management
Interrupt Sources
Analog Inputs
I/O Lines
Timer Triggers
PWM Event Lines
ADC12B Pin Description
The ADC12B Controller is not continuously clocked. The programmer must first enable the
ADC12B Controller clock in the Power Management Controller (PMC) before using the ADC12B
Controller. However, if the application does not require ADC12B operations, the ADC12B Con-
troller clock can be stopped when not needed and restarted when necessary.
Configuring the ADC12B Controller does not require the ADC12B Controller clock to be
enabled.
The ADC12B interrupt line is connected on one of the sources of the Nested Vectored Interrupt
Controller (NVIC). Using the ADC12B interrupt requires the NVIC to be programmed first.
Table 41-2.
The analog input pins are multiplexed with PIO lines. The assignment of the ADC12B input is
automatically done as soon as the corresponding channel is enabled by writing the register
ADC12B_CHER. By default, after reset, the PIO line is configured as an input with its pull-up
enabled and the ADC12B input is connected to the GND.
The AD12BTRG pin is shared with other peripheral functions through the PIO Controller. In this
case, the PIO Controller needs to be set accordingly to assign the AD12BTRG pin to the
ADC12B function.
Table 41-3.
Timer Counters may or may not be used as hardware triggers depending on user requirements.
Thus, some or all of the timer counters may be non-connected.
PWM Event Lines may or may not be used as hardware triggers depending on user
requirements.
Instance
ADC12B
Instance
ADC12B
Peripheral IDs
I/O Lines
Description
Analog input channels
External trigger
26
ID
AD12BTRG
Signal
I/O Line
PA2
6430D–ATARM–25-Mar-11
Peripheral
B