ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 865

Manufacturer Part Number

KIT EVAL FOR AT91SAM3U CORTEX

Manufacturer

Processor To Be Evaluated

Data Bus Width

Interface Type

Operating Supply Voltage

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

Board CD Docs

Rohs Compliant

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Manufacturer

Part Number:

Manufacturer:

Current page: 865 of 1171
Download datasheet (25Mb)

6430D–ATARM–25-Mar-11

Power Management

Interrupt Sources

Fault Inputs

The PWM is not continuously clocked. The programmer must first enable the

Power Management Controller (PMC) before using the

not require PWM operations, the

later. In this case, the

is connected.

not recommended to use the

mentation of these module within the product for detailed information about the fault generation

procedure. The

interrupt line is connected on one of the internal sources of the Interrupt Controller.

has the FAULT inputs connected to the different modules. Please refer to the imple-

description, Master Clock (MCK) is the clock of the peripheral bus to which the

Peripheral IDs

interrupt requires the Interrupt Controller to be programmed first. Note that it is

receives faults from PIO inputs, PMC, ADC controller,

will resume its operations where it left off.

interrupt line in edge sensitive mode.

clock can be stopped when not needed and be restarted

. However, if the application does

SAM3U Series

clock in the

ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 865

ATSAM3U-EK

Specifications of ATSAM3U-EK

Available stocks

Related parts for ATSAM3U-EK