ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 1155

• Manufacturer Part Number: ATSAM3U-EK
• Description: KIT EVAL FOR AT91SAM3U CORTEX
• Manufacturer: Atmel
• Type: MCUr

Specifications of ATSAM3U-EK

• Contents: Board
• Processor To Be Evaluated: SAM3U
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3 V
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: SAM3U4E
• Silicon Family Name: SAM3U
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6430D–ATARM–25-Mar-11
Doc.
Rev.
6430C
Comments (Continued)
RTC:
Section 18.3.2
Section 18.5 ”Real Time Clock (RTC) User
TIMEVSEL, CALEVSEL bitfield descriptions reorganized.
SSC:
Redundant letter C removed from title.
SUPC:
Section 19.4 ”Supply Controller (SUPC) User
FWUPDBC, WUPDBC bitfield descriptions reorganized.
Backup supply is VDDBU
TC:
Figure 36-2 ”Clock Chaining
updated bitfields: TC0XC0S, TC1XC1S, TC2XC2S, TCCLKS, BURST, ETRGEDG, LDRA, LDRB, TCCLKS,
BURST, EEVTEDG, EEVT, WAVSEL, ACPA, ACPC, AEEVT, ASWTRG, BCPB, BCPC, BEEVT, BSWTRG
UDHP:
Figure 39-4 ”Logical Address Space for DPR
Figure 39-1 ”Block
Figure 39.4 ”Product
Figure 39-6 ”Register
USART:
Section 35.6.7 ”Modem
Section 35.6 ”Functional
Section 35.6.8.2 ”Baud Rate”
SPI Master Mode: ...”the value programmed in CD must be superior or equal to 6.”
SPI Slave Mode:...”the external clock (SCK) frequency must be at least 6 times lower than the system clock.”
Section 35.6.1 ”Baud Rate
USART mode, or 6 in SPI mode.”
Section 35.6.1.3 ”Baud Rate in Synchronous Mode or SPI
MCK/3 in USART mode, or MCK/6 in SPI mode.”
”Interrupt”, updated.
Diagram”, 1 PMC to UTMI signal line. Notes removed.
Dependencies”, added to datasheet.
Mapping”, DMA offset updated to 0x300 + channel *...
Mode”, is available.
Description”, ...SCK up to MCK/6
Generator”,”...signal provided on SCK must be at least 3 times lower than MCK in
Selection”, channel 1 updated.
Interface”, the reset for RTC_CALR is 0x01210720.
Access”, EP0 has but 1 bank
Interface”, offset updated for GPBR: 0x90-0xDC.
Mode”, ...”limits the SCK maximum frequency to
SAM3U Series
Change
Request
Ref.
7071
7046/7087
6796
6949
6950
6796
6714
6687
6796
6750
6792
rfo
6822
6791
rfo→ 7097
1155