ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 142
ATSAM3U-EK
Manufacturer Part Number
ATSAM3U-EK
Description
KIT EVAL FOR AT91SAM3U CORTEX
Manufacturer
Atmel
Type
MCUr
Datasheets
1.ATSAM3U-EK.pdf
(2 pages)
2.ATSAM3U-EK.pdf
(61 pages)
3.ATSAM3U-EK.pdf
(1171 pages)
4.ATSAM3U-EK.pdf
(53 pages)
Specifications of ATSAM3U-EK
Contents
Board
Processor To Be Evaluated
SAM3U
Data Bus Width
32 bit
Interface Type
RS-232, USB
Operating Supply Voltage
3 V
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
SAM3U4E
Silicon Family Name
SAM3U
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT91SAM3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3U-EK
Manufacturer:
Atmel
Quantity:
10
- ATSAM3U-EK PDF datasheet
- ATSAM3U-EK PDF datasheet #2
- ATSAM3U-EK PDF datasheet #3
- ATSAM3U-EK PDF datasheet #4
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13.15.1
13.15.1.1
13.15.1.2
13.15.1.3
13.15.1.4
13.15.1.5
142
BFC
BFI
SAM3U Series
BFC and BFI
Syntax
Operation
Restrictions
Condition flags
Examples
R4, #8, #12
R9, R2, #8, #12
Bit Field Clear and Bit Field Insert.
where:
cond
Rd
Rn
lsb
width
BFC clears a bitfield in a register. It clears width bits in Rd, starting at the low bit position lsb.
Other bits in Rd are unchanged.
BFI copies a bitfield into one register from another register. It replaces width bits in Rd starting at
the low bit position lsb, with width bits from Rn starting at bit[0]. Other bits in Rd are unchanged.
Do not use SP and do not use PC.
These instructions do not affect the flags.
BFC{cond} Rd, #lsb, #width
BFI{cond} Rd, Rn, #lsb, #width
; Clear bit 8 to bit 19 (12 bits) of R4 to 0
; Replace bit 8 to bit 19 (12 bits) of R9 with
; bit 0 to bit 11 from R2
is an optional condition code, see
is the destination register.
is the source register.
is the position of the least significant bit of the bitfield.
lsb must be in the range 0 to 31.
is the width of the bitfield and must be in the range 1 to 32− lsb.
“Conditional execution” on page
6430D–ATARM–25-Mar-11
100.
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