ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 1165

• Manufacturer Part Number: ATSAM3U-EK
• Description: KIT EVAL FOR AT91SAM3U CORTEX
• Manufacturer: Atmel
• Type: MCUr

Specifications of ATSAM3U-EK

• Contents: Board
• Processor To Be Evaluated: SAM3U
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3 V
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: SAM3U4E
• Silicon Family Name: SAM3U
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24 Bus Matrix (MATRIX) ............................................................................ 339
25 Static Memory Controller (SMC) ......................................................... 353
26 Peripheral DMA Controller (PDC) ....................................................... 441
27 Clock Generator ................................................................................... 453
6430D–ATARM–25-Mar-11
23.5 Hardware and Software Constraints ..................................................................338
24.1 Description .........................................................................................................339
24.2 Memory Mapping ...............................................................................................339
24.3 Special Bus Granting Techniques .....................................................................339
24.4 Arbitration ..........................................................................................................340
24.5 Write Protect Registers ......................................................................................342
24.6 Bus Matrix (MATRIX) User Interface .................................................................343
25.1 Description .........................................................................................................353
25.2 Embedded Characteristics ................................................................................353
25.3 Block Diagram ...................................................................................................354
25.4 I/O Lines Description .........................................................................................355
25.5 Multiplexed Signals ............................................................................................355
25.6 Application Example ..........................................................................................356
25.7 Product Dependencies ......................................................................................356
25.8 External Memory Mapping .................................................................................357
25.9 Connection to External Devices ........................................................................358
25.10 Standard Read and Write Protocols ................................................................360
25.11 Scrambling/Unscrambling Function .................................................................366
25.12 Automatic Wait States .....................................................................................367
25.13 Data Float Wait States .....................................................................................370
25.14 External Wait ...................................................................................................375
25.15 Slow Clock Mode .............................................................................................381
25.16 NAND Flash Controller Operations .................................................................384
25.17 SMC Error Correcting Code Functional Description ........................................396
25.18 Static Memory Controller (SMC) User Interface ..............................................400
26.1 Description .........................................................................................................441
26.2 Block Diagram ...................................................................................................442
26.3 Functional Description .......................................................................................442
26.4 Peripheral DMA Controller (PDC) User Interface ..............................................445
27.1 Description .........................................................................................................453
27.2 Block Diagram ...................................................................................................454
SAM3U Series
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