ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 1136

KIT EVAL FOR AT91SAM3U CORTEX

ATSAM3U-EK

Manufacturer Part Number
ATSAM3U-EK
Description
KIT EVAL FOR AT91SAM3U CORTEX
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of ATSAM3U-EK

Contents
Board
Processor To Be Evaluated
SAM3U
Data Bus Width
32 bit
Interface Type
RS-232, USB
Operating Supply Voltage
3 V
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
SAM3U4E
Silicon Family Name
SAM3U
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT91SAM3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3U-EK
Manufacturer:
Atmel
Quantity:
10
Table 43-50. SMC Write Signals - NWE Controlled (WRITE_MODE = 1) (Continued)
Table 43-51. SMC Write NCS Controlled (WRITE_MODE = 0)
Notes:
1136
Symbol
SMC
SMC
SMC
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
19
20
21
22
23
24
25
26
27
1. hold length = total cycle duration - setup duration - pulse duration. “hold length” is for “ncs wr hold length” or “NWE hold
2. 1.8V domain: VDDIO from 1.65V to 1.95V, maximum external capacitor = 25 pF
3. 3.3V domain: VDDIO from 3.0V to 3.6V, maximum external capacitor = 25 pF.
SAM3U Series
length”.
Parameter
NWE High to Data OUT, NBS0/A0
NBS1, NBS2/A1, NBS3, A2 - A25
change
NWE High to NCS Inactive
NWE High to Data OUT, NBS0/A0
NBS1, NBS2/A1, NBS3, A2 - A25,
NCS change
Parameter
Data Out Valid before NCS High
NCS Pulse Width
NBS0/A0 NBS1, NBS2/A1, NBS3,
A2 - A25 valid before NCS low
NWE low before NCS high
NCS High to Data Out, NBS0/A0,
NBS1, NBS2/A1, NBS3, A2 - A25,
change
NCS High to NWE Inactive
(1)
(1)
NO HOLD SETTINGS (nwe hold = 0)
HOLD SETTINGS (nwe hold ≠ 0)
wr hold)* t
(ncs wr setup -
(nwe hold - ncs
ncs wr pulse *
ncs wr pulse *
ncs wr setup *
(ncs wr hold -
ncs wr hold *
nwe setup +
t
t
ncs pulse)*
t
nwe hold)*
CPMCK
CPMCK
nwe hold *
t
t
t
t
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
1.8V
1.8V
- 3
4
- 2.5
- 6.5
(2)
- 5.5
(2)
- 5
- 3
- 3
- 5
CPMCK
Min
Min
(ncs wr setup -
ncs wr setup *
ncs wr pulse *
ncs wr pulse *
(ncs wr hold -
(nwe hold - ncs
ncs wr hold *
nwe setup +
t
t
ncs pulse)*
t
nwe hold)*
CPMCK
CPMCK
CPMCK
t
t
t
t
nwe hold *
CPMCK
CPMCK
CPMCK
CPMCK
t
wr hold)*
3.3V
CPMCK
3.3V
4
- 2.5
- 5.5
- 4.5
(3)
- 5.5
- 5
- 2
- 2
(3)
- 3
1.8V
1.8V
(2)
(2)
Max
Max
3.3V
3.3V
6430D–ATARM–25-Mar-11
(3)
(3)
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns

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