ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 254

Manufacturer Part Number

KIT EVAL FOR AT91SAM3U CORTEX

Manufacturer

Processor To Be Evaluated

Data Bus Width

Interface Type

Operating Supply Voltage

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

Board CD Docs

Rohs Compliant

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Manufacturer

Part Number:

Manufacturer:

Figure 16-7.

if (URSTEN = 0) and

SAM3U Series

Peripheral Access

(URSTIEN = 1)

Reset Controller Status and Interrupt

resynchronization

• SRCMP bit: This field indicates that a Software Reset Command is in progress and that no

• NRSTL bit: The NRSTL bit of the Status Register gives the level of the NRST pin sampled on

• URSTS bit: A high-to-low transition of the NRST pin sets the URSTS bit of the RSTC_SR

further software reset should be performed until the end of the current one. This bit is

automatically cleared at the end of the current software reset.

each MCK rising edge.

16-7). If the User Reset is disabled (URSTEN = 0) and if the interruption is enabled by the

URSTIEN bit in the RSTC_MR register, the URSTS bit triggers an interrupt. Reading the

RSTC_SR status register resets the URSTS bit and clears the interrupt.

resynchronization

6430D–ATARM–25-Mar-11