ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 1161

• Manufacturer Part Number: ATSAM3U-EK
• Description: KIT EVAL FOR AT91SAM3U CORTEX
• Manufacturer: Atmel
• Type: MCUr

Specifications of ATSAM3U-EK

• Contents: Board
• Processor To Be Evaluated: SAM3U
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3 V
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: SAM3U4E
• Silicon Family Name: SAM3U
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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6430D–ATARM–25-Mar-11
Features ..................................................................................................... 1
SAM3U Description .................................................................................. 2
SAM3U Block Diagram ............................................................................ 3
Signal Description .................................................................................... 5
Package and Pinout ................................................................................. 9
Power Considerations ........................................................................... 15
Input/Output Lines ................................................................................. 24
Processor and Architecture .................................................................. 26
1.1 Configuration Summary ...........................................................................................2
3.1 Design Considerations ............................................................................................8
4.1 SAM3U4/2/1E Package and Pinout .........................................................................9
4.2 SAM3U4/2/1C Package and Pinout ......................................................................12
5.1 Power Supplies ......................................................................................................15
5.2 Voltage Regulator ..................................................................................................15
5.3 Typical Powering Schematics ................................................................................15
5.4 Active Mode ...........................................................................................................19
5.5 Low Power Modes .................................................................................................19
5.6 Wake-up Sources ..................................................................................................22
5.7 Fast Start-Up .........................................................................................................23
6.1 General Purpose I/O Lines (GPIO) ........................................................................24
6.2 System I/O Lines ...................................................................................................24
6.3 Serial Wire JTAG Debug Port (SWJ-DP) ..............................................................24
6.4 Test Pin .................................................................................................................25
6.5 NRST Pin ...............................................................................................................25
6.6 NRSTB Pin ............................................................................................................25
6.7 ERASE Pin ............................................................................................................25
7.1 ARM Cortex-M3 Processor ....................................................................................26
7.2 APB/AHB Bridges ..................................................................................................26
7.3 Matrix Masters .......................................................................................................26
7.4 Matrix Slaves .........................................................................................................27
7.5 Master to Slave Access .........................................................................................27
7.6 DMA Controller ......................................................................................................28
7.7 Peripheral DMA Controller .....................................................................................28
7.8 Debug and Test Features ......................................................................................29
SAM3U Series
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