ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 169

• Manufacturer Part Number: ATSAM3U-EK
• Description: KIT EVAL FOR AT91SAM3U CORTEX
• Manufacturer: Atmel
• Type: MCUr

Specifications of ATSAM3U-EK

• Contents: Board
• Processor To Be Evaluated: SAM3U
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3 V
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: SAM3U4E
• Silicon Family Name: SAM3U
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.19.2
• SETENA
Interrupt set-enable bits.
Write:
0 = no effect
1 = enable interrupt.
Read:
0 = interrupt disabled
1 = interrupt enabled.
If a pending interrupt is enabled, the NVIC activates the interrupt based on its priority. If an interrupt is not enabled, assert-
ing its interrupt signal changes the interrupt state to pending, but the NVIC never activates the interrupt, regardless of its
priority.
6430D–ATARM–25-Mar-11
31
23
15
7
Interrupt Set-enable Registers
30
22
14
6
The ISER0 register enables interrupts, and show which interrupts are enabled. See:
The bit assignments are:
• the register summary in
•
Table 13-28 on page 168
29
21
13
5
28
20
12
4
Table 13-27 on page 167
SETENA bits
SETENA bits
SETENA bits
SETENA bits
for which interrupts are controlled by each register.
27
19
11
3
for the register attributes
26
18
10
2
SAM3U Series
25
17
9
1
24
16
8
0
169