ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 130

• Manufacturer Part Number: ATSAM3U-EK
• Description: KIT EVAL FOR AT91SAM3U CORTEX
• Manufacturer: Atmel
• Type: MCUr

Specifications of ATSAM3U-EK

• Contents: Board
• Processor To Be Evaluated: SAM3U
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3 V
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: SAM3U4E
• Silicon Family Name: SAM3U
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.12.6
13.12.6.1
13.12.6.2
13.12.6.3
130
SAM3U Series
MOV and MVN
Syntax
Operation
Restrictions
Move and Move NOT.
where:
S
result of the operation, see
cond
Rd
Operand2
details of the options.
imm16
The MOV instruction copies the value of Operand2 into Rd.
When Operand2 in a MOV instruction is a register with a shift other than LSL #0, the preferred
syntax is the corresponding shift instruction:
Also, the MOV instruction permits additional forms of Operand2 as synonyms for shift
instructions:
See
The MVN instruction takes the value of Operand2, performs a bitwise logical NOT operation on
the value, and places the result into Rd.
The MOVW instruction provides the same function as MOV, but is restricted to using the imm16
operand.
You can use SP and PC only in the MOV instruction, with the following restrictions:
When Rd is PC in a MOV instruction:
• ASR{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, ASR #n
• LSL{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, LSL #n if n != 0
• LSR{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, LSR #n
• ROR{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, ROR #n
• RRX{S}{cond} Rd, Rm is the preferred syntax for MOV{S}{cond} Rd, Rm, RRX.
• MOV{S}{cond} Rd, Rm, ASR Rs is a synonym for ASR{S}{cond} Rd, Rm, Rs
• MOV{S}{cond} Rd, Rm, LSL Rs is a synonym for LSL{S}{cond} Rd, Rm, Rs
• MOV{S}{cond} Rd, Rm, LSR Rs is a synonym for LSR{S}{cond} Rd, Rm, Rs
• MOV{S}{cond} Rd, Rm, ROR Rs is a synonym for ROR{S}{cond} Rd, Rm, Rs
• the second operand must be a register without shift
• you must not specify the S suffix.
MOV{S}{cond} Rd, Operand2
MOV{cond} Rd, #imm16
MVN{S}{cond} Rd, Operand2
“ASR, LSL, LSR, ROR, and RRX” on page
is an optional suffix. If S is specified, the condition code flags are updated on the
is an optional condition code, see
is the destination register.
is a flexible second operand. See
is any value in the range 0-65535.
“Conditional execution” on page
126.
“Conditional execution” on page
“Flexible second operand” on page 96
100.
6430D–ATARM–25-Mar-11
100.
for